Rakun LS1 system IP block is small foot-print, verified and proven building block consisting of CPU and memory subsystem for easy and inexpensive integration. Complete platform with hardware, Intelectual Property (IP), software and design support.
It is pre-designed and based on NXP’s LS1021A processor, member of the QorIQ Layerscape 1 family. It features up to 5000 CoreMarks of CPU power, 1GB DDR3L memory with ECC, 1GB NAND Flash memory, 10/100/1000 Ethernet PHY, 4 6Gb/s SerDes Lanes used for SGMII/PCIe/SATA, PWM channels, CAN bus, UARTs etc.
It is available in the form of PCB layout segment that can be easily integrated into customer specific board. It offers a lot of interfaces, used in telecom and industrial applications. Customization of the system is also available even for smaller quantities.
It runs Linux operating system.
CPU
NXP LS1021A CPU, dual A7 cores running up to 5000 CoreMarks.
Dual-core Cortex A7 architecture. 32KB data and 32KB instruction L1 cache per core. 521KB unified L2 cache. Floating point units, NEON co-processor. QorIQ trust architecture.
QUICC Engine uLite block: 32bit RISC controller, 2 UCCs. Supporting HDLC, TDM, UARTs (PROFIBUS).
Memory
1GB DDR3L memory with ECC. 1600MHz data rate, 32 bit bus. Optional capacities are 256MB, 512MB, 2GB and 4GB (commercial temp range only).
1GB NAND flash (8 bit bus). Hardware accelerated high speed access with ECC support. Optional capacities are 128MB, 256MB, 512MB and 2GB.
32MB QSPI NOR flash. Optional capacities are 4MB to 512MB. It is the default boot memory. There are two devices on the bus, boot agent can swap them in case of boot failure.